I use Eagle for my PCB design and I generally find it to be a nice piece of software. One annoyance that I came across recently was the seemingly hard task of doing a “bulk rename” of components on a schematic.
I tried searching for how to do this, but couldn’t find an answer that did what I want.
As an example, here’s what I wanted to do:
- Create six red LEDs (RED1 through RED6) with cathodes connected to GND
- Create six green LEDs (GRN1 through GRN6) with cathodes connected to GND
- Create six blue LEDs (BLU1 through BLU6) with cathodes connected to GND
So I’m aiming for this, with LEDs ready for connecting to a driver:
The really slow way to do this is to:
- Create all 18 LEDs
- Rename them individually
- Connect up the cathodes
This is boring, slow and error-prone (about 5 minutes).
The slightly faster way is to:
- Create an LED, rename it to RED1
- Copy five times, which creates RED2 through 6
- Repeat 1 and 2 for GRN and BLU LEDs
- Connect up cathodes
This is slightly less boring and error prone (about 2 minutes 30 seconds).
Here’s what I want to do:
- Create six LEDs, join up cathodes to GND
- Copy this group twice
- Rename each group of LEDs in one operation
I couldn’t find any way to perform the last bit (a bulk rename), so I looked into writing my own ULP (User Language Program) to rename a group. The ULP would take a prefix, number and optional suffix as input. Then with the currently selected group of components, rename each using the fixed prefix and suffix, with the number incrementing each time.
For example, the inputs “RED, 1″ would rename the selected group “RED1, RED2, RED3, …, REDx”, where x is the last component in the group. The inputs “U, 10, A” would rename the selected group “U10A, U11A, U12A, …, UxA”, where x is the last component in the group.
The ULP for this only took 45 minutes to write by referencing (copying from) the examples and existing ULPs. It shows a confirmation box before committing (the individual rename operations go into the undo history as well).
This script reduced the time it took to create the schematic in the picture above to 1 minute 15 seconds.
I think this will save me a lot of time. The ULP is available my Eagle github repo.