Huge Seven Segment Display #2

Logic Design

This is my second post on the days-accident-free counter I made for Nottingham Hackspace. See the first one here

This post is on the electronic design of the counter. First up:

Clock Selection

Counting once-per-day is hard in electronics. I think it’s pretty impossible to directly generate a 1-day period square wave that’s even remotely stable.

No, the best way is to take a high frequency signal and divide it down. This can be done with binary counters, where each output is a division of the input clock (starting at Q0=Fclk/2).

All very well, but how to generate a stable high-frequency source? Luckily, AC power won the war of currents, and the mains can provide both power and clock.

I made a 12V AC transformer power supply, which feeds into the display. This is used to both power the electronics and generate a clock. The 50Hz 12V AC signal is clipped by two diodes to generate a nice square wave.

Input Clock Drawing

Basic schematic of the input clock circuit

This square wave is used as the clock for two 4040 12-bit timers, forming a single 24-bit timer.

24 bits of division reduce the 50Hz down to a range of binary divisions of 50Hz. One clock per day is 11.574074074 uHz!. Keep dividing 50Hz by 2 repeatedly, and you will find that no single output will provide this frequency.

At this point, it’s easier to think about time than frequency. I want an output that will turn on after 86400 seconds, then reset its own counter. So, if I AND together lots of outputs from the clock, the AND gate output will turn on when all those outputs are high.

An output goes high halfway through its period, so I actually need to AND together the outputs that will give a period of 2 days, not one:

86400 * 2 = 167772.16 + 262.144 + 131.07 + 655.536 + 32.768 + 81.92 + 20.48 + 10.24

Phew! So, an 8 input AND gate is needed, which luckily is a single 4068 IC. This is used as the one-day clock, and also to reset the 4040 counters back to zero.

One Day Clock Schematic

A basic schematic for the one-per-day clock

The clock is brought to a header along with power and “big red button” reset, and this is where the driver boards are connected.

Driver Boards

Compared to the clock generation circuit, each driver board is pretty simple. A 4510 decade counter is clocked with the incoming clock, and the carry output goes to the next board. There’s a reset input as well,for when the button is pressed.

The 4510 outputs a 4-bit count for 0 to 9, which is decoded by a 4511 BCD-to-seven-segment decoder. This is fed to a ULN2003 driver that pulls the LED cathodes to ground. This is because the LEDs draw a fair bit of current (I haven’t actually measured it, but it’s probably more than a 4511 can handle).

Driver Board Schematic

A basic schematic for the LED driver board

That’s it!

That’s the vast majority of the electronics, apart from a logic based PWM auto-dimming circuit that I’ll be covering in a future post.

The next post will look at the physical construction of the box and LED segments.

This entry was posted in Electronics and tagged , , . Bookmark the permalink.

2 Responses to Huge Seven Segment Display #2

  1. Pingback: Huge Seven Segment Display | Return Zero

  2. Pingback: Huge Seven Segment Display #4 | Return Zero

Leave a Reply

Fill in your details below or click an icon to log in: Logo

You are commenting using your account. Log Out /  Change )

Google+ photo

You are commenting using your Google+ account. Log Out /  Change )

Twitter picture

You are commenting using your Twitter account. Log Out /  Change )

Facebook photo

You are commenting using your Facebook account. Log Out /  Change )


Connecting to %s